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| programmable_bitmap_sequencer [2020/09/28 17:27] – [Principles of operation] laubzega | programmable_bitmap_sequencer [2022/07/14 15:23] (current) – [Principles of operation] silverdr |
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| The first condition is normally met, so no point worrying about it. \\ | The first condition is normally met, so no point worrying about it. \\ |
| As soon as ''S_ACTIVE'' is set, VASYL starts paying attention to the contents of ''S_CYC_START'' and ''S_CYC_STOP'' registers. Normally, after power up or reset these registers are set respectively to 15 and 55, values that correspond to the left and right edges of visible display area. In other words, by default, if ''S_ACTIVE'' is set, PBS overrides all forty memory accesses in any given display line. This is convenient, but by no means required - our window can be as narrow a single cycle. For example, to approximate the configuration visible in the picture, we could set ''S_CYC_START'' to 15+5=20 and ''S_CYC_STOP'' to 55-12=43. | As soon as ''S_ACTIVE'' is set, VASYL starts paying attention to the contents of ''S_CYC_START'' and ''S_CYC_STOP'' registers. Normally, after power up or reset these registers are set respectively to 15 and 55, values that correspond to the left and right edges of visible display area. In other words, by default, if ''S_ACTIVE'' is set, PBS overrides all forty memory accesses in any given display line. This is convenient, but by no means required - our window can be as narrow as a single cycle. For example, to approximate the configuration visible in the picture, we could set ''S_CYC_START'' to 15+5=20 and ''S_CYC_STOP'' to 55-12=43. |
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| Once PBS decides to act, it performs following operations in every cycle: | Once PBS decides to act, it performs following operations in every cycle: |
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| - It uses an internal copy of ''S_BASE'' register to determine where to fetch the graphics data from. ''S_BASE'' is a 16-bit register, so the addressable memory is 64KiB - one memory bank. Which of the eight memory banks is used is controlled by bits ''S_RAMBANK'' in register ''PBS_CONTROL'' (''$40:210''). | - It uses an internal copy of ''S_BASE'' register to determine where to fetch graphics data from. ''S_BASE'' is a 16-bit register, so the addressable memory is 64KiB - one memory bank. Which of the eight memory banks is used is controlled by bits ''S_RAMBANK'' in register ''PBS_CONTROL'' (''$40:210''). |
| - Once the byte is fetched, VASYL can do some simple bit operations on it (see below), then writes it to the VIC-II data bus. | - Once graphics data byte is fetched, VASYL can do some simple bitwise operations on it (see below), then writes it to the VIC-II data bus. |
| - Finally, the internal copy of ''S_BASE'' is incremented by ''S_STEP'', yielding the address of a byte to use in the next cycle. With a typically organized graphics data, this value is equal to 1. | - Finally, the internal copy of ''S_BASE'' is incremented by ''S_STEP'', yielding the address of a byte to use in the next cycle. With a typically organized graphics data, this value is equal to 1. |
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