Differences
This shows you the differences between two versions of the page.
Both sides previous revisionPrevious revision | |
programmable_bitmap_sequencer [2022/07/14 15:20] – [Principles of operation] silverdr | programmable_bitmap_sequencer [2022/07/14 15:23] (current) – [Principles of operation] silverdr |
---|
Once PBS decides to act, it performs following operations in every cycle: | Once PBS decides to act, it performs following operations in every cycle: |
| |
- It uses an internal copy of ''S_BASE'' register to determine where to fetch the graphics data from. ''S_BASE'' is a 16-bit register, so the addressable memory is 64KiB - one memory bank. Which of the eight memory banks is used is controlled by bits ''S_RAMBANK'' in register ''PBS_CONTROL'' (''$40:210''). | - It uses an internal copy of ''S_BASE'' register to determine where to fetch graphics data from. ''S_BASE'' is a 16-bit register, so the addressable memory is 64KiB - one memory bank. Which of the eight memory banks is used is controlled by bits ''S_RAMBANK'' in register ''PBS_CONTROL'' (''$40:210''). |
- Once the byte is fetched, VASYL can do some simple bit operations on it (see below), then writes it to the VIC-II data bus. | - Once graphics data byte is fetched, VASYL can do some simple bitwise operations on it (see below), then writes it to the VIC-II data bus. |
- Finally, the internal copy of ''S_BASE'' is incremented by ''S_STEP'', yielding the address of a byte to use in the next cycle. With a typically organized graphics data, this value is equal to 1. | - Finally, the internal copy of ''S_BASE'' is incremented by ''S_STEP'', yielding the address of a byte to use in the next cycle. With a typically organized graphics data, this value is equal to 1. |
| |