Differences

This shows you the differences between two versions of the page.

--- playground:playground [2020/05/23 23:19] – laubzega
+++ playground:playground [2020/05/25 22:52] – removed laubzega
@@ Line 1: / Line 1: @@
-====== PlayGround ======
-{{tablelayout?colwidth="20px,30px,30px,30px,100px"&rowsHeaderSource=1&rowsVisible=2&float=right}}
-^ Address ^ Name ^ Width [bits] ^ Description ^
-| $D030   | CTRL | 8 | Main control register |
-| $D030:0 | DLIST_ON | 1 | When set to "1", display list execution will start at the beginning of the next frame. \\ When set to "0", display list execution stops immediately. |
-| $D030:1 | PORT_READ_ENABLE | 1 | When "1" data can be read from both memory ports. |
-| $D030:345 | RAMBANK | 3 | Number of bank (0 to 7) accessible through memory ports. |
-| $D30:6 | RESERVED | 1| RESERVED - Always "0" on reads. |
-| $D030:7 | GRAYDOT_DISABLE | 1 | "1" disables HMOS VIC-II gray dots visible on CPU writes \\ "0" - dots are visible as usual |
-| $D031 | DLISTL | 8 | Lo-byte of address from which execution of Display List will start. |
-| $D032 | DLISTH | 8 | Hi-byte of address from which execution of Display List will start. |
-| $D033 | DLSTROBE | 8 | Writing to this register will start execution of Display List pointed to by DLIST(LH) from the next cycle. If MSB is set, bits 0-2 are copied to bits 3-5 of CTRL2 ($D040) \\ On reads returns VASYL version in bits 3-7 and VIC-II autoconfiguration data in bits 0-2: \\ 000 - NTSC \\ 110 - PAL \\ 100 - PAL-M \\ 011 - NTSC 6567R56A |