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making_full_use_of_memory_ports [2020/10/11 23:36]
laubzega created
making_full_use_of_memory_ports [2020/10/13 20:02]
laubzega [Accessing ports from a display list]
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 ==== REP0 and REP1 ==== ==== REP0 and REP1 ====
  
-As you remember from the introductory chapter, writing a value to register ''PORT0'' will transfer that value to a destination in local memory pointed to by ''ADR0L'' and ''ADR0H'':+As you remember from the introductory chapter, writing a value to register ''PORT0'' will transfer that value to a destination in local memory pointed to by ''ADR0L'' and ''ADR0H''. For instance, this code
  
 <code> <code>
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 While this approach is faster than copying data in C64 base memory (you can use the simplest addressing modes, and don't have to worry about updating the source and destination addresses), it still is far below theoretical throughput of the ports - even with unrolled loops the best we can do is around 8 cycles per byte (<125KB/s). While this approach is faster than copying data in C64 base memory (you can use the simplest addressing modes, and don't have to worry about updating the source and destination addresses), it still is far below theoretical throughput of the ports - even with unrolled loops the best we can do is around 8 cycles per byte (<125KB/s).
  
-As you might have already suspected, we can side-step the CPU entirely, and copy data directly using ports' DMA channels. This mode is activated by activating ''CTRL_PORT_COPY_MODE'' in ''CONTROL'' register. Here is the fast way to copy 256-bytes:+As you might have already suspected, we can side-step the CPU entirely, and copy data directly using ports' DMA channels. This mode is activated by setting ''CTRL_PORT_COPY_MODE'' in ''CONTROL'' register. Here is the fast way to copy 256-bytes:
  
 <code> <code>
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         LDA #0           ; As previously, "0" means "256".         LDA #0           ; As previously, "0" means "256".
-        STA VREG_REP1    ; Write to REP1 kick-offs hardware copy.+        STA VREG_REP1    ; Write to REP1 kicks off hardware copy.
 </code> </code>
  
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 Final two comments: Final two comments:
   - Because of how DMA channels are allocated within a cycle, accelerated copying is only possible  from PORT0 to PORT1, not the other way around   - Because of how DMA channels are allocated within a cycle, accelerated copying is only possible  from PORT0 to PORT1, not the other way around
-  - ''STEP0'' and ''STEP1'' can naturally differ, enabling you to reorganize your data as you copy it: change order, insert gaps, etc.+  - ''STEP0'' and ''STEP1'' can naturally be different from each other, enabling you to reorganize your data as you copy it: change order, insert gaps, etc.
  
 For comprehensive example demonstrating use of all these features, please see [[https://github.com/madhackerslab/beamracer-examples/blob/master/asm/demo_hirestext.s|demo_hirestext.s]]. For comprehensive example demonstrating use of all these features, please see [[https://github.com/madhackerslab/beamracer-examples/blob/master/asm/demo_hirestext.s|demo_hirestext.s]].
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 </code> </code>
  
-Will read a value from PORT1, and store it VIC border color register. Here is a more complete example using PORT0.+will read a value from PORT1, and store it in VIC border color register. Here is a more complete example using PORT0.
  
 <code vasyl> <code vasyl>
making_full_use_of_memory_ports.txt ยท Last modified: 2020/10/18 21:56 by laubzega