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introduction_to_programming_the_beamracer [2020/07/01 03:57] – [Local Memory] silverdrintroduction_to_programming_the_beamracer [2020/10/08 14:45] – [Local Memory] laubzega
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 In order to maintain a high level of compatibility with existing C64 software, BeamRacer remains hidden on power up, and the computer behaves as if it was not there. That is, register writes are ignored, and reads report the same values as those in a vanilla C64. In order to maintain a high level of compatibility with existing C64 software, BeamRacer remains hidden on power up, and the computer behaves as if it was not there. That is, register writes are ignored, and reads report the same values as those in a vanilla C64.
-It is necessary to perform so-called “register knocking” for the board to reveal its presence. This is achieved by writing a sequence $42, $52  (screen codes for “BR”) to register $D030. To check if the board is indeed there, register $D030 can be then read and compared with “0”.+It is necessary to perform so-called “register knocking” for the board to reveal its presence. This is achieved by writing a sequence $42, $52  (screen codes for “BR”) to register $D031. To check if the board is indeed there, register $D031 can then be read and compared with “0”.
  
 <code  [enable_line_numbers="false"]> <code  [enable_line_numbers="false"]>
- LDX $D030+VREG_CONTROL = $D031 
 + 
 + LDX VREG_CONTROL
  INX  INX
  BNE BEAMRACER_ALREADY_ACTIVE  BNE BEAMRACER_ALREADY_ACTIVE
  LDX #$42  LDX #$42
- STX $D030+ STX VREG_CONTROL
  LDX #$52  LDX #$52
- STX $D030 + STX VREG_CONTROL 
- LDX $D030+ LDX VREG_CONTROL
  BEQ BEAMRACER_FOUND_AND_ACTIVATED  BEQ BEAMRACER_FOUND_AND_ACTIVATED
  RTS ; sadly, no BeamRacer...  RTS ; sadly, no BeamRacer...
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 ==== Local Memory ==== ==== Local Memory ====
  
-For VASYL to execute a display list, it first needs to be placed in its local memory (LRAM). BeamRacer provides VASYL with 512KiB of LRAM, organized in 8 banks of 64KiB each. The 6510 can put data into LRAM using two one-byte wide ports. Each port is built out of five registers:+For VASYL to execute a display list, it first needs to be placed in its local memory (LRAM). BeamRacer provides VASYL with eight banks of 64KiB of LRAM each. The 6510 can put data into LRAM using two one-byte wide ports. Each port is built out of five registers:
  
   * [[registers#ADR0L|ADRL]]   * [[registers#ADR0L|ADRL]]
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  LDA #$20  LDA #$20
  STA VREG_ADR0H  STA VREG_ADR0H
- LDA #$01 ; advance LRAM pointer by one on every transfer+ LDA #$01 ; advance LRAM pointer by one after every transfer
  STA VREG_STEP0  STA VREG_STEP0
  LDX #0  LDX #0
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 </code> </code>
  
-On some occasions you may also want to read from LRAM with the CPU. There is an extra step involved, as many 6510 addressing modes result in a bus READ access before the requested WRITE occurs, which could lead to confusing results if not used with care. Register CTRL1 has a bit named PORT_READ_ENABLE, which is used to enable reading from both ports. To read every 4th byte of a 256-byte long sequence starting from LRAM location 0, the following code would be used+On some occasions you may also want to read from LRAM with the CPU. There is an extra step involved, as many 6510 addressing modes result in a bus READ access before the requested WRITE occurs, which could lead to confusing results if not used with care. Register CONTROL has a bit named PORT_READ_ENABLE, which is used to enable reading from both ports. To read every 4th byte of a 256-byte long sequence starting from LRAM location 0, the following code would be used
  
 <code> <code>
- LDA VREG_CTRL1+ LDA VREG_CONTROL
  ORA #CTRL_PORT_READ_ENABLE  ORA #CTRL_PORT_READ_ENABLE
- STA VREG_CTRL1+ STA VREG_CONTROL
    
  LDA #$00  LDA #$00
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 <code vasyl> <code vasyl>
-dlist: 
     WAIT  48,13     WAIT  48,13
     MOV $20, 1     MOV $20, 1
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     MOV $20, 0     MOV $20, 0
     END         ; this is a handy alias for instruction "WAIT 511,63"     END         ; this is a handy alias for instruction "WAIT 511,63"
-dlend: 
 </code> </code>
  
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 <code vasyl> <code vasyl>
-dlist: 
     WAIT  48, 0     WAIT  48, 0
     MOV $20,15     MOV $20,15
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     MOV $20,15     MOV $20,15
     END     END
-dlend: 
 </code> </code>
  
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 <code vasyl> <code vasyl>
-dlist: 
     WAIT    48, 0 ; starting line     WAIT    48, 0 ; starting line
     MOV    $20,15     MOV    $20,15
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     MOV    $20,15     MOV    $20,15
     END     END
-dlend: 
 </code> </code>
  
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 <code vasyl> <code vasyl>
-dlist: 
     WAIT    48, 0 ; starting line     WAIT    48, 0 ; starting line
 loop:     loop:    
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     BRA    loop         ; loop endlessly     BRA    loop         ; loop endlessly
     END                 ; never reached     END                 ; never reached
-dlend: 
 </code> </code>
  
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 To make a counter run, we now need to use instruction "[[isa#DECA|DECA]]" for counter A, or "[[isa#DECB|DECB]]" for counter B. What it does is a bit more complicated - first, it checks if the value held by respective counter is equal to "0", and if it is, it skips the next two bytes of the display list (which usually is how much space the next instruction occupies). If the value in the counter is anything else than zero, the instruction decrements it by one, and then continues normally. \\ This is best illustrated building on the previous example, with newly added lines highlighted. To make a counter run, we now need to use instruction "[[isa#DECA|DECA]]" for counter A, or "[[isa#DECB|DECB]]" for counter B. What it does is a bit more complicated - first, it checks if the value held by respective counter is equal to "0", and if it is, it skips the next two bytes of the display list (which usually is how much space the next instruction occupies). If the value in the counter is anything else than zero, the instruction decrements it by one, and then continues normally. \\ This is best illustrated building on the previous example, with newly added lines highlighted.
  
-<code vasyl [highlight_lines_extra="3,13"]> +<code vasyl [highlight_lines_extra="2,12"]>
-dlist:+
     WAIT    48, 0 ; starting line     WAIT    48, 0 ; starting line
     SETA     3          ; load 3 to counter 0     SETA     3          ; load 3 to counter 0
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     BRA    loop         ; will be skipped when counter 0 reaches 0     BRA    loop         ; will be skipped when counter 0 reaches 0
     END     END
-dlend: 
 </code> </code>
  
introduction_to_programming_the_beamracer.txt · Last modified: 2021/09/10 01:49 by silverdr